Place of Origin: | GERMANY |
Brand Name: | LENZE |
Certification: | CE |
Model Number: | EVS9322-ER |
Minimum Order Quantity: | 1pcs |
---|---|
Packaging Details: | carton |
Delivery Time: | in stock |
Payment Terms: | T/T, Western Union, MoneyGram |
Supply Ability: | 100pcs/week |
LENZE: | LENZE | GERMANY: | GERMANY |
---|---|---|---|
Material: | Iron | EVS9322-ER: | EVS9322-ER |
Color: | Black | Temperature: | 20-90 |
Wire: | Wire |
Plug-in connection for backplane bus ④ Fastening screws |
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The following table shows the meaning of the corresponding operation of the operating mode buttons. |
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Figure 2-8 View of the CPU 1511C-1 PN - rearperating mode buttons You use the operating mode buttons to set the operating mode of the CPU |
Table 2- 5 Meaning of the operating mode buttonsress the operating mode button
STOP.
Result: The RUN/STOP LED lights
up yellow.
2. Press the operating mode button
STOP until the RUN/STOP LED
lights up for the 2nd time and remains
continuously lit (this takes
three seconds). After this, release
the button.
3. Press the operating mode button
STOP again within the next three
seconds.
Manual memory reset
(with inserted SIMATIC
memory card)
or
Reset to factory settings
(without inserted SIMATIC
mThe technology functions of the compact CPU have the following technical properties:
● 16 high-speed digital inputs (up to 100 kHz), isolated
– 6 high-speed counters (High Speed Counter/HSC), 4 of which can be used as A/B/N
● Interfaces
– 24 V encoder signals of sourcing or push-pull encoders and sensors
– 24 V encoder supply output, short-circuit-proof
– Up to 2 additional digital inputs per high-speed counter for possible HSC DI functions
(Sync, Capture, Gate)
– 1 digital output per high-speed counter for fast reaction to the count
● Counting range: 32 bits
● Diagnostics and hardware interrupts can be configured
● Supported encoder/signal types
– 24 V incremental encoder
(with 2 tracks A and B, phase-shifted by 90°, up to 4 incremental encoders also with
zero track N)
– 24 V pulse encoder with direction signal
– 24 V pulse encoder without direction signal
– 24 V pulse encoder each for forward pulse & reverse pulse
The high-speed counters support reconfiguration in RUN. You can find additional information
in chapter Parameter data records of the high-speed counters (Page 173).Counting refers to the detection and adding up of events. The counters acquire and evaluate
encoder signals and pulses. You can specify the count direction using suitable encoder or
pulse signals or through the user program.
You can control counting processes using the digital inputs. You can switch the digital
outputs exactly at defined count values, regardless of the user program.
You can configure the response of the counters using the functionalities described below.
Counting limits
The counting limits define the count value range used. The counting limits are selectable and
can be modified during runtime by the user program.
The highest counting limit that can be set is 2147483647 (231–1). The lowest counting limit
that can be set is –2147483648 (–231).
You can configure the response of the counter at the counting limits:
● Continue or stop counting (automatic gate stop) on violation of a counting limit
● Set count value to start value or to opposite counting limit on violation of a counting limit
Start value
You can configure a start value within the counting limits. The start value can be modified
during runtime by the user program.
Depending on the parameter assignment, the compact CPU can set the current count value
to the start value during synchronization, during the Capture function, on violation of a
counting limit or when the gate is opened.
Gate control
The opening and closing of the hardware gate (HW gate) and software gate (SW gate)
defines the period of time during which the counting signals are acquired.
The digital inputs of the digital on-board I/O control the HW gate. The user program controls
the software gate. You can enable the hardware gate using the parameter assignment. The
software gate (bit in the control interface of the cyclic I/O data) cannot be disabled.You can configure an external reference signal edge that triggers the saving of the current
count value as a Capture value. The following external signals can trigger the Captu