n RUN, the user program can
control the period duration via the
control and feedback interface of
the channel.
x to 10 000 000 μs (10 s)
at 100 kHz hardware output
(high-speed output (0.1 A) activated):
10 μs to 10 000 000 μs
(10 s)
at 10 kHz hardware output (highspeed
output (0.1 A) deactivated):
100 μs to 10 000 000 μs
(10 s)
at 100 kHz hardware output
(high-speed output (0.1 A) deactivated):
10 000 μs (10 ms) to
10 000 000 μs (10 sThe parameter "Pulse output
(DQA)" defines the hardware output
to use as pulse output channel.
For B:
X11, terminal 21 (DQ0 / %Q4.0):
10 kHz / 0.5 A or 100 kHz / 0.1 A
Hardware
output for the
least significant
address
For B:
X11, terminal 31 (DQ8 / %Q5.0):
100 Hz / 0.5 A
Output signals for pulse width modulation (PWM) mode
Output signal Meaning Value range
Continuous pulse current at the digital
output PWM DQA
A pulse is output at the digital output PWM
DQA for the set on-load factor and cycle
duration.
Continuous pulse current
3.2.1.2 Operating mode: Frequency output
In this operating mode you can assign a frequency value with high frequencies more
precisely than by using period duration in PWM mode.
A rectangular signal with an assigned frequency and a constant on-load factor of 50 % is
generated at the digital output.
The frequency output mode has the following functions:
● When the option "High-speed output (0.1 A)" is activated, you can generate a minimum
pulse duration of 2 μs at a current of 100 mA. If the option "High-speed output (0.1 A)" is
not activated, you can generate a minimum pulse duration of 20 μs with a load > 0.1 A
and a minimum pulse duration of 40 μs with a load of ≥ 2 mA and a current of maximum
0.5 A.
If you use a standard output, you can generate a minimum pulse duration of 400 μs with
a load of > 0.1 A and a minimum pulse duration of 500 μs with a load of ≥ 2 mA and a
current of max. 0.5 A.
MinimumFor the frequency output mode, the user program directly accesses the control and feedback
interface of the channel.
A reconfiguration via the instructions WRREC/RDREC and parameter assignment data
record 128 is supported. You can find additional information in section Parameter data
records (PWM) (Page 187).The control program must initiate the enable for the output sequence with the help of the
software enable (SW_ENABLE 0 → 1). The feedback bit STS_SW_ENABLE indicates that
the software enable is pending at the pulse generator.
If the software enable is activated (rising edge), STS_ENABLE is set. The output sequence
runs continuously, as long as SW_ENABLE is set.
Note
Output control signal TM_CTRL_DQ
? If TM_CTRL_DQ = 1, the technology function takes over the control and generates pulse
sequences at the output PWM DQA.
? If TM_CTRL_DQ = 0, the user program takes over the control and the user can directly
set the output PWM DQA via the control bit SET_DQA.
Canceling the output sequence
Deactivating the software enable (SW_ENABLE = 1 → 0) during the frequency output
cancels the current output sequence. The last cycle duration is not completed.
STS_ENABLE and the digital output PWM DQA are immediately reset to 0.
A renewed pulse output is only possible after a restart of the output sequenceYou set the frequency with the OUTPUT_VALUE directly with the control program in the