The current changes are entered in the data record 128 during the reading back of the
parameter assignment data with RDREC from the user program. These changes are
lost during a warm restart of the CPU.
● Mode for cyclic updating (MODE_SLOT = 1)
Use this operating mode if the program is to continuously control another parameter in
addition to the main parameter to be controlled.
– The value in SLOT is transferred with each module cycle.
– No acknowledgment bit is available.
– The value of LD_SLOT defines the interpretation of SLOT (see the table below
"Interpretation of the SLOT parameter value").
– If the value in SLOT is not valid, the error ERR_SLOT_VAL occurs. The error is
automatically reset as soon as a valid value is loaded.
– In this mode the value in the parameter assignment data record is not updated. If
LD_SLOT is changed in this mode, the last value applied from LD_SLOT is valid.
– The mode for permanent updating can be stopped by setting LD_SLOT to 0 and
MODE_SLOT to 0. By stopping the mode for permanent updating the changes made
at the parameters during the permanent updating are retained until the next changes
via SLOT (cyclic or once) or until the next STOP-RUN transitionThe value written in the SLOT parameter is displayed as in the table below depending on the
LD_SLOT value and the mode is interpreted.The following representation illustrates the workflow of the individual updating of the
parameter 'Period duration'. The described workflow principle can also be used on the
channels of the high-speed counters.User writes the first parameter in SLOT and specifies the first parameter in LD_SLOT
② Technology channel applies the first parameter and indicates the application by change in the
bit STS_LD_SLOT
③ User writes the second parameter in SLOT and specifies the second parameter in LD_SLOT
④ Technology channel applies the second parameter and indicates the application by change in
the bit STS_LD_SLOT
⑤ User writes 0 in LD_SLOT, (SLOT inactive)
⑥ Technology channels answers change in LD_SLOT with a change in STS_LD_SLOT
Figure 3-4 Individual updating
Note that the following requirements apply to the representation shown above:
● The value MODE_SLOT must be set to 0
● Errors or invalid values are shown in the feedback bit ERR_SLOT_VAL
● The error must be acknowledged
If MODE_SLOT 0 = 1, the following applies (for PWM mode only):
● The value in SLOT is continuously evaluated according to LD_SLOT
● STS_LD_SLOT does not change
● An error is automatically reset as soon as a valid value is set in SLOTThe following representation illustrates the execution of the cyclic updating of the parameter
'Period duration'. The described workflow principle can also be used on the channels of the
high-speed counters.? User sets SLOT to the required parameter
? User sets MODE_SLOT to 1
? User sets LD_SLOT to the required value (1 for period duration)
② User changes value in SLOT continuously and technology channel evaluates continuously
③ Value in SLOT exceeds permitted limit, technology channel shows this ERR_SLOT_VAL and
continues working with the last valid value
④ Value in SLOT again in permitted range, technology channel resets ERR_SLOT_VAL independently
and continues working with the value in SLOT
⑤ User resets LD_SLOT and MODE_SLOT, technology channel continues to work with last value
Figure 3-5 Cyclic updatingThe user program receives current values and status information from the pulse width
modulation via the feedback interface.
Feedback interface per channel
The following table shows the feedback interface assignment:The channel is correctly configured, is operating
and supplying valid data.
0: Not ready to run
1: Ready to run
STS_SW_ENABLE Current status of the software enable 0: SW_ENABLE is not active
1: SW_ENABLE detected
STS_LD_SLOT Acknowledgment bit for each action of the SLOT
in the SLOT mode for individual updating (for a
description of the acknowledgment bit, refer to the
section Handling the SLOT parameter (control
interface) (Page 71)).
Each switching of this bit represents
a successful LD_SLOT action.
STS_ENABLE The output sequence is active.
(STS_ENABLE always depends on the status of
the software enable STS_SW_ENABLE ab)
0: No output sequence running
1: Output sequence running
STS_DQA State of the pulse output (DQA) 0: Pulse output is not active
1: Pulse output is active
Feedback parameters Meaning Value range
ERR_PWR No supply voltage L+ 0: No error
1: Error
ERR_LD Error during loading of a parameter value in the
operating mode for individual updating
0: No error
1: Error
ERR_OUT_VAL The value in OUTPUT_VALUE is invalid 0: No error
1: Error
ERR_SLOT_VAL The value in SLOT is invalid, where MODE_SLOT
= 1 (permanent updating)
0: No error
1: ErrorThe connecting plug for the supply voltage is plugged in when the CPU ships from the
factory.
The following table shows the terminal assignment for a 24 V DC power supply.
① +24 V DC of the supply voltage
② Ground of the supply voltage
③ Ground of the supply voltage for loop-through (maximum of 10 A permitted)
④ +24 V DC of the supply voltage for loop-through (maximum of 10 A permitted)
⑤ Spring-loaded NC contact (one spring-loaded NC contact per terminal)
Bridged internally:
① and ④
② and ③
Figure 4-1 Connection for supply voltage
If the CPU is supplied by a system power supply, it is not necessary to connect the 24 V
supply.The assignment corresponds to the Ethernet standard for an RJ45 plug.
● When autonegotiation is deactivated, the RJ45 socket is allocated as a switch (MDI-X).
● When autonegotiation is activated, autocrossing is in effect and the RJ45 socket is
allocated either as data terminal equipment (MDI) or a switch (MDI-XFor more information on "Wiring the CPU" and "Accessories/spare parts", refer to the S7-
1500, ET 200MP system manual The CPU 1512C-1 PN has a PROFINET interface with two ports. The PROFINET interface
itself has a MAC address, and each of the two PROFINET ports has its own MAC address.
The CPU 1512C-1 PN therefore has three MAC addresses in total.
The MAC addresses of the PROFINET ports are needed for the LLDP protocol, for example