DWORD: Value range: –2147483648 to 2147483647D or 80000000 to 7FFFFFFFH
36-39 Low counting limit:
DWORD: Value range: –2147483648 to 2147483647D or 80000000 to 7FFFFFFFH
40-43 Update time:
DWORD: Value range in μs: 0 to 250000Response to gate start: Response to counting limit violation: Reset at counting limit violation:
00B: Set to start value 000B: Stop counting 000B: To other counting limit
01B: Continue with current
value
001B: Continue counting 001B: On start value
10 to 11B: Reserved 010 to 111B: Reserved 010 to 111B: Reserved1511C' setting is configured, the parameter data record definition of
CPU 1511C applies. See device manual of CPU 151You have the option of reassigning the pulse width modulation parameters in RUN. The
parameters are transferred with the instruction WRREC via the data record 128 to the PWM
submodule.
If errors occur when transferring or validating parameters with the WRREC instruction, the
module continues operation with the previous parameter assignment. The output parameter
STATUS then contains a corresponding error code. If no error has occurred, the length of
the data actually transferred is entered in the ?output parameter STATUS.
You can find a description of the "WRREC" instruction and the error codes in the STEP 7
(TIA Portal) online helpSupported value range depending on configured values for "Pulse output (DQA)" and "High-speed output
(0.1 A)"
? for 100 kHz DQ (high-speed output activated): 10 μs to 10 000 000 μs (10 s)
? for 10 kHz DQ (high-speed output deactivated): 100 μs to 10 000 000 μs (10 s)
? for 100 Hz DQ (high-speed output deactivated): 10 000 μs (10 ms) to 10 000 000 μs (10 s)
Default = 2 000 000 μs (2 s)
Frequency output: ReservedAn integrated analog-to-digital converter converts the analog signal into a digital signal in
order that the compact CPU can process the analog signal read in by an analog channel.
Once the CPU has processed the digital signal, an integrated digital-to-analog converter
converts the output signal into an analog current or voltage value.
Interference frequency suppression
The interference frequency suppression of the analog inputs suppresses the interference
caused by the frequency of the AC voltage network used. The frequency of the AC voltage
network may interfere with measured values, particularly for measurements within narrow
voltage ranges.
You set the line frequency with which the plant operates (400, 60, 50 or 10 Hz) using the
"Interference frequency suppression" parameter in STEP 7 (TIA Portal). The "Interference
frequency suppression" parameter can only be set module-wide (for all input channels). The
interference frequency suppression filters out the set interference frequency
(400/60/50/10 Hz) as well as multiples of it. The selected interference frequency suppression
also defines the integration time. The conversion time changes depending on the set
interference frequency suppression.
For example, an interference frequency suppression of 50 Hz corresponds to an integration
time of 20 ms. The analog on-board I/O supplies one measured value to the CPU every
millisecond over a period of 20 ms. This measured value corresponds to the floating mean
value of the last 20 measurements.The following figure shows how this works using a 400 Hz interference frequency
suppression as an example. A 400 Hz interference frequency suppression corresponds to an
integration time of 2.5 ms. The analog on-board I/O supplies a measured value to the CPU
every 1.25 milliseconds within the integration time.
The following figure shows how this works using a 60 Hz interference frequency suppression
as an example. A 60 Hz interference frequency suppression corresponds to an integration
time of 16.6 ms. The analog on-board I/O supplies a measured value to the CPU every 1.04
milliseconds within the integration timeThe following figure shows how this works using a 50 Hz interference frequency suppression
as an example. A 50 Hz interference frequency suppression corresponds to an integration
time of 20 ms. The analog on-board I/O supplies a measured value to the CPU every
millisecond within the integration time.The following figure shows how this works using a 10 Hz interference frequency suppression
as an example. A 10 Hz interference frequency suppression corresponds to an integration
time of 100 ms. The analog on-board I/O supplies a measured value to the CPU every
millisecond within the integration time.