TAMAGAWA TS5208N569 TS5208N569 TS5208N569 TS5208N569 TS5208N569 TS5208N569

TS3103N156

TS5208N569

TS5000

TS5080

TS5170

TS5410

TS5200N500

TS5146

TS5270

TS5610

TS5620

TS1857

TS5607

TS5668N20

TS5667N120

TS5667N420

TS5645

TS5647

TS5648

TS5643

TS2223

TS2224

TS2225

TS20E12

TS13E11

For each scan cycle, the CPU writes the outputs, reads the inputs, executes the user
program, updates communication modules,

Each scan cycle begins by retrieving the current values of the digital and analog outputs
from the process image and then writing them to the physical outputs of the CPU, SB,
and SM modules configured for automatic I/O update (default configuration). When a
physical output is accessed by an instruction, both the output process image and the
physical output itself are updated.
● The scan cycle continues by reading the current values of the digital and analog inputs
from the CPU, SB, and SMs configured for automatic I/O update (default configuration),
and then writing these values to the process image. When a physical input is accessed
by an instruction, the value of the physical input is accessed by the instruction, but the
input process image is not updated.
● After reading the inputs, the user program is executed from the first instruction through
the end instruction. This includes all the program cycle OBs plus all their associated FCs
and FBs. The program cycle OBs are executed in order according to the OB number with
the lowest OB number executing first.
Communications processing occurs periodically throughout the scan, possibly interrupting
user program execution.
Self-diagnostic checks include periodic checks of the system and the I/O module status
checks.
Interrupts can occur during any part of the scan cycle, and are event-driven. When an event
occurs, the CPU interrupts the scan cycle and calls the OB that was configured to process
that event. After the OB finishes processing the event, the CPU resumes execution of the
user program at the point of interruption.
OBs control the execution of the user program. Each OB must have a unique OB number.
The default OB numbers are reserved below 200. Other OBs must be numbered 200 or
greater.
Specific events in the CPU trigger the execution of an organization block. OBs cannot call
each other or be called from an FC or FB. Only a start event, such as a diagnostic interrupt

or a time interval, can start the execution of an OB. The CPU handles OBs according to their
respective priority classes, with higher priority OBs executed before lower priority OBs. The
lowest priority class is 1 (for the main program cycle), and the highest priority class is 26 (for
the time-error interrupts)OBs control the following operations:
● Program cycle OBs execute cyclically while the CPU is in RUN mode. The main block of
the program is a program cycle OB. This is where you place the instructions that control
your program and where you call additional user blocks. Multiple program cycle OBs are
allowed and are executed in numerical order. OB 1 is the default. Other program cycle
OBs must be identified as OB 200 or greater.
● Startup OBs execute one time when the operating mode of the CPU changes from STOP
to RUN, including powering up in the RUN mode and in commanded STOP-to-RUN
transitions. After completion, the main "Program cycle" OB will begin executing. Multiple
startup OBs are allowed. OB 100 is the default. Others must be OB 200 or greater.
● Cyclic interrupt OBs execute at a specified interval. A cyclic interrupt OB will interrupt
cyclic program execution at user defined intervals, such as every 2 seconds. You can
configure up to a total of 4 for both the time-delay and cyclic events at any given time,
with one OB allowed for each configured time-delay and cyclic event. The OB must be
OB 200 or greater.
● Hardware interrupt OBs execute when the relevant hardware event occurs, including
rising and falling edges on built-in digital inputs and HSC events. A hardware interrupt OB