TAMAGAWA TS5210N453 TS5210N453 TS5210N453 TS5210N453 TS5210N453 TS5210N453

TS3103N156

TS5210N453

TS5312N616-2000C-T

TS5312N616

TS5217N530

DIH35-5000C/T-P8-L6-5V

OIH100-1024C/T-P2-12V

TS5233N430

DIH48-6000C/T-P8-L6-5V

TS5246N430

TS1857N112

TS5213N551

TS5214N364

TS5312N512-2000C/TOSE.5KN-6-12-108

TS5146N11

BKO-NC6214

TS5214N500

48-2500PA-L6-5V

TS5205N4540IH60-8192C/T-P8-L6-5V

TS3699N172

TS3653N3E8

1510N122

TS3653N1E2

TS5667N120

B 65535
1 program cycle event
Multiple OBs allowed
 Startup OB ends
 Last program cycle OB ends
1
Startup OB 100, OB 200 to
OB 65535
1 startup event 1, 2
Multiple OBs allowed
STOP-to-RUN transition 1
Time OB 200 to OB 65535 Up to 4 time events Time-delay OB event is scheduled 3 3
1 OB per event Cyclic OB event is scheduled 7
Edges:
 Rising edge events: 16 max.
 Falling edge events: 16 max.
Process OB 200 to OB 65535 Up to 50 process events 5 4
1 OB per event
For HSC:
 CV=PV: 6 max.
 Direction changed: 6 max.
 External reset: 6 max.
The startup event and the program cycle event will never occur at the same time because the startup event will run to
completion before the program cycle event will be started (controlled by the operating system).
2 Only the diagnostic error event (OB 82) interrupts the startup event. All other events are queued to be processed after
the startup event has finished.
3 The CPU provides a total of 4 time events that are shared by the time-delay OBs and the cyclic OBs. The number of
time-delay and cyclic OBs in your user program cannot exceed 4.
4 You can have more than 50 process events if you use the DETACH and ATTACH instructions.
5 You can configure the CPU to stay in RUN if the maximum scan cycle time was exceeded or you can use the
RE_TRIGR instruction to reset the cycle time. However, the CPU goes to STOP mode the second time that the
maximum scan cycle time was exceeded in one scan cycle.
After the execution of an OB with a priority of 2 to 25 has started, processing of that OB
cannot be interrupted by the occurrence of another event, except for by OB 80 (time-error
event, which has a priority of 26). All other events are queued for later processing, allowing
the current OB to finish.

Interrupt latency
The interrupt event latency (the time from notification of the CPU that an event has occurred
until the CPU begins execution of the first instruction in the OB that services the event) is
approximately 175 µsec, provided that a program cycle OB is the only event service routine
active at the time of the interrupt event.
Understanding time error events
The occurrence of any of several different time error conditions results in a time error event.
The following time errors are supported:
● Maximum cycle time exceeded
● Requested OB cannot be started
● Queue overflow occurred
The maximum cycle time exceeded condition results if the program cycle does not complete
within the specified maximum scan cycle time. See the section on "Monitoring the cycle time
in the System Manual" (Page 80) for more information regarding the maximum
cycle time condition, how to configure the maximum scan cycle time, and how to reset the
cycle timer.The requested OB cannot be started condition results if an OB is requested by a cyclic
interrupt, a time-delay interrupt, or a time-of-day interrupt, but the requested OB is already
being executed.
The queue overflow occurred condition results if the interrupts are occurring faster than they
can be processed. The number of pending (queued) events is limited using a different queue
for each event type.